XCENA and Samsung put 3,072 RISC-V cores on a CXL memory card
Jin Kim's prototype combines 2TB of DDR5, SSD-backed memory and near-data processing as XCENA targets late-2026 production.
By RuntimeWire Staff · Published
Primary source: Chips and Cheese
Why it matters
XCENA is turning memory into a programmable compute tier, a bet that could lower AI inference costs if MX1 survives production and software-integration tests.
Jin Kim and XCENA, the South Korean computational-memory developer he co-founded, used Hot Chips 2026 on August 25th to demonstrate a memory expansion card that can execute selected jobs itself. MX1 combines up to 2TB of DDR5, SSD-backed memory and 3,072 small RISC-V cores on silicon manufactured with Samsung Electronics' 4nm process.…