Celero raises $275M at a $3B-plus valuation for AI networking chips

Broadcom and ClariPhy veterans Nariman Yousefi and Oscar Agazzi paired the round with a claimed 2-nanometer coherent DSP milestone.

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Primary source: Bloomberg Technology

Why it matters

AI infrastructure spending is moving beyond accelerators and into the optical links connecting them. Celero's valuation shows investors are willing to price experienced chip founders ahead of volume production.

An ultra-close-up view of a complex microchip with intricate glowing pathways and metallic connections.

Nariman Yousefi and Oscar Agazzi have raised $275 million for Celero Communications, valuing their two-year-old semiconductor developer at more than $3 billion as investors push deeper into the networking hardware needed to connect large AI clusters.

Bloomberg reported the financing on Tuesday. Celero's announcement identified the round as a Series C jointly led by Atreides Management, Valor Equity Partners and Alphabet's CapitalG. Sutter Hill Ventures and Maverick Capital continued as participating investors.

Celero says the round brings its total funding to $415 million. The financing follows a $100 million Series B led by CapitalG in November 2025, part of the $140 million Celero said it had raised by that point. Atreides managing partner and chief investment officer Gavin Baker will join Celero's board, while CapitalG general partner James Luo is also a director.

The valuation rests heavily on the founders' track record. Before co-founding Celero in 2024, Yousefi spent 17 years at Broadcom and later ran coherent-DSP developer ClariPhy Communications. Inphi agreed to acquire ClariPhy for $275 million in cash in 2016. Yousefi subsequently led coherent DSP and other chip businesses at Inphi and Marvell.

Agazzi brings the technical half of the pairing. According to Celero's leadership biography, he was chief architect for Broadcom's copper physical-layer products, held senior engineering roles at ClariPhy and Inphi, and later served as chief technology officer of Marvell's coherent-DSP business. Celero identifies him as a Bell Labs Fellow and an IEEE Fellow.

The founders are returning to a category they helped build, this time with AI data centers rather than traditional telecommunications networks as the target market.

The expensive problem between the accelerators

Celero designs coherent digital signal processors, chips that encode electrical data into optical signals for transmission over fiber and decode the signals at the other end. The DSP also compensates for degradation that occurs as data moves across an optical link.

That function is becoming more important as operators connect greater numbers of AI accelerators across racks, buildings and data-center campuses. Buying faster GPUs produces diminishing returns when the surrounding network cannot move data among them quickly enough or consumes too much power doing it.

Celero's thesis is that coherent optical technology can improve the speed, scalability and energy efficiency of AI infrastructure as links advance toward 1.6-terabit products and future 3.2-terabit AI optical interconnects. Traditional coherent systems can transmit data farther, but were designed for telecom networks where power, cost and latency requirements differ from those inside an AI computing cluster.

In a technical post published alongside the financing, Celero said its architecture is intended to support 1.6-terabit products and future 3.2-terabit AI optical interconnects. Celero is targeting links within accelerator systems, across racks and between data-center buildings.

Celero also says it has validated the industry's first 2-nanometer coherent DSP silicon with advanced analog technology. That claim has not been independently established. Validation does establish that Celero has working silicon rather than a slide-deck architecture, but Celero's description of the new capital as funding for "production readiness" places the product before volume manufacturing.

Yousefi said in Celero's financing announcement the financing would let Celero "strengthen production readiness and bring the next generation of coherent connectivity to market faster." The round will also fund research, development and the product roadmap, according to Celero.

That distinction matters at a valuation above $3 billion. Investors are pricing Celero on its technical milestone, the founders' history of shipping networking silicon and the scale of expected AI infrastructure spending. Production volumes, customer deployments and revenue will determine whether that price anticipated a durable chip supplier or arrived well before commercial adoption.

Optical networking gets its own funding cycle

Celero's round fits a broader move by investors and chipmakers to treat data movement as a separate AI infrastructure opportunity. The approaches vary, but each starts with the same constraint: more accelerators create more traffic, heat and cabling inside a cluster.

Ayar Labs raised $500 million at a stated $3.75 billion valuation in March 2026 to expand production of optical engines placed alongside computing packages. Lightmatter announced a 1.6-terabit-per-fiber demonstration with Qualcomm that month. Marvell completed its roughly $3.25 billion acquisition of Celestial AI in February.

Those companies focus heavily on optical I/O, photonic engines or bringing optical connections closer to processors. Celero is betting that a coherent DSP designed specifically for AI networks can extend optical bandwidth across the data center without importing the cost and power profile of long-haul telecom equipment.

The fundraising gives Yousefi and Agazzi substantial resources to turn that argument into a manufactured product. It also gives Celero a demanding benchmark: the founders have already built and sold a coherent-DSP developer once. At a $3 billion-plus valuation, the second act has been priced for a much larger outcome.

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